In very-large-scale integration (VLSI) technology, tantalum silicide has been proposed to be useful in a variety of applications. These include: policide gate metallization (i.e., the use of tantalum silicide in combination with a doped polycrystalline silicon (poly-Si) underlayer as a low resistive gate metallization layer); silicide gate (i.e., the use of tantalum silicide as a directly deposited layer on a gate oxide to reduce sheet resistance); source-drain silicidation (i.e., the use of tantalum silicide in the silicidation of contacts thereby providing in low resistive contacts); and diffusion barrier (i.e., the use of tantalum silicide a diffusion barrier between an Al—Si—Ti layer and silicon thereby providing reliable and low resistive contacts to n+ and p+ Si). Tantalum silicon nitride (Ta—Si—N) has also been shown to form a useful conductive barrier layer between silicon substrates and copper interconnects to reduce copper diffusion.
Amorphous ultra-thin (i.e., less than 100 Å) tantalum-silicon-nitrogen barrier films have been disclosed for use between silicon and copper interconnection materials in integrated circuits. These barrier films suppress the diffusion of copper into silicon, thus improving device reliability. Physical vapor deposition (PVD) methods, such as reactive sputtering, have been disclosed to form noncrystalline, low resistivity Ta—Si—N layers that acts as a barrier to oxygen diffusion during high temperature annealing at 650° C. in the presence of O2. The Ta—Si—N layers are formed by using radio-frequency reactive sputtering with pure Ta and Si targets on a 100 nm thick polysilicon layer. Layers having relatively low silicon content, such as Ta0.50Si0.16N0.34, have been disclosed to have a desirable combination of good diffusion barrier resistance along with low sheet resistance. These Ta—Si—N barrier layers have improved peel resistance over Ta—N barrier layers during annealing conditions.
However, when PVD methods are used, the stoichiometric composition of the formed metal silicon nitride barrier layers such as Ta—Si—N can be non-uniform across the substrate surface due to different sputter yields of Ta, Si, and N. Further, PVD methods yield films with poor conformality on structured surfaces, even when a single source is used. Due to the resulting poor layer conformality, defects such as pinholes often occur in such layers creating pathways to diffusion. As a result, the effectiveness of a physically deposited diffusion barrier layer is dependent on the layer being sufficiently thick. Moreover, sufficiently thick layers may not even be obtainable on surfaces having sufficiently deep structures.
Vapor deposition processes are preferable to PVD processes in order to achieve the most efficient and uniform barrier layer coverage of substrate surfaces. There remains a need for vapor deposition processes, particularly atomic layer deposition processes, to form tantalum silicon nitride barrier layers on substrates, such as semiconductor substrates or substrate assemblies.